The present invention relates to a shift register for shifting a data therethrough in synchronism with a shift clock signal and, more particularly, to a shift register used for producing a plurality of continuous pulses in accordance with shifting a data therethrough in synchronism with a shift clock signal.
A shift register is composed of a plurality of a data-shift stages connected in cascade. Each of the data-shift stages temporarily holds a data supplied thereto from a preceding stage in synchronism with one of leading and trailing edges of an clock pulse signal. The data holding stage produces an output during adjacent two leading or trailing edges of the clock pulse signal. Thereafter, the data holding stage supplies its data to succeeding stage. Accordingly, the shift register shifts an input data supplied to the leading data-shift stage toward the last data-shift stage successively in synchronism with the shift clock signal.
Since the input data is successively shifted one stage by one stage in order, a plurality of pulses generating in sequence can be derived from the shift register by providing terminals on respective stages, each of which connects to the succeeding data-shift stage. These pulses thus derived can be used as drive pulses for driving transistors. An example is to drive transistors for sampling an analog signal such as video signal or audio signal in time sequence. Another is to drive transistors for designating a digit or a row to be displayed in a display panel.
However, since each of the data-shift stages derives the data in synchronism with the same leading or trailing edges of the shift clock signal, the trailing edge portion of the driving pulse generated from one data-shift stage may overlap with the leading edge portion of the driving pulse generated from the succeeding data-shift stage. For this reason, there may occur a time period during which two stages both generate drive pulses. This causes that the analog signal is not sampled accurately and two digits or rows of the display panel are simultaneously designated to be displayed.